System Features
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Parallelized risk control processing based on FPGA full parallel capability
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Large throughput, processing hundreds of thousands of orders per second
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Order processing latency as low as 1.5 microseconds
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The core logic is designed with FPGA to provide technical support for extremely fast performance
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Easy deployment and maintenance, integrated delivery and deployment, support for multiple deployment solutions
Performance
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low latency
Risk control detection delay as low as 1.5 microseconds
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Large processing capacity
Up to 10 million orders can be processed on the same day
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Support exchange risk control detection
Support Shenzhen Stock Exchange and Shanghai Stock Exchange option trading risk control detection
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Support multiple risk control rules
Traffic rules, frequent order rules, frequent order cancellation rules
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Multi-counter multi-user
Support up to 15 users, 8 counters, each user supports 2048 stocks
9th Floor, Building A, National Engineering Laboratory Building, Gaoxin Nanqidao Digital Technology Park, Nanshan District, Shenzhen
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